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ultralow distortion, high speed amplifiers ad8007/ad8008 rev. e information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2002C2009 analog devices, inc. all rights reserved. features extremely low distortion second harmonic ?88 dbc @ 5 mhz ?83 dbc @ 20 mhz (ad8007) ?77 dbc @ 20 mhz (ad8008) third harmonic ?101 dbc @ 5 mhz ?92 dbc @ 20 mhz (ad8007) ?98 dbc @ 20 mhz (ad8008) high speed 650 mhz, ?3 db bandwidth (g = +1) 1000 v/s slew rate low noise 2.7 nv/hz input voltage noise 22.5 pa/hz input inverting current noise low power: 9 ma/amplifier typical supply current wide supply voltage range: 5 v to 12 v 0.5 mv typical input offset voltage small packaging: 8-lead soic, 8-lead msop, and 5-lead sc70 applications instrumentation if and baseband amplifiers filters a/d drivers dac buffers connection diagrams 8 7 6 5 1 2 3 4 nc = no connect nc ?in +in nc +v s v out nc ?v s ad8007 (top view) 02866-001 figure 1. 8-lead soic (r) 5 1 2 3 ?in +in +v s v out ?v s 4 ad8007 (top view) 02866-002 figure 2. 5-lead sc70 (ks) 1 v out1 ?in1 +in1 ?v s +v s v out2 ?in2 +in2 8 27 36 45 ad8008 (top view) 02866-003 figure 3. 8-lead soic (r) and 8-lead msop (rm) general description the ad8007 (single) and ad8008 (dual) are high performance current feedback amplifiers with ultralow distortion and noise. unlike other high performance amplifiers, the low price and low quiescent current allow these amplifiers to be used in a wide range of applications. analog devices, inc., proprietary second-generation extra-fast complementary bipolar (xfcb) process enables such high performance amplifiers with low power consumption. the ad8007/ad8008 have 650 mhz bandwidth, 2.7 nv/hz voltage noise, ?83 db sfdr at 20 mhz (ad8007), and ?77 dbc sfdr at 20 mhz (ad8008). with the wide supply voltage range (5 v to 12 v) and wide bandwidth, the ad8007/ad8008 are designed to work in a variety of applications. the ad8007/ad8008 amplifiers have a low power supply current of 9 ma/amplifier. the ad8007 is available in a tiny sc70 package as well as a standard 8-lead soic. the dual ad8008 is available in both an 8-lead soic and an 8-lead msop. these amplifiers are rated to work over the industrial temperature range of ?40c to +85c. frequency (mhz) ? 30 ?40 ?110 11 10 disto 0 0 r tion (dbc) ?70 ?80 ?90 ?100 ?50 ?60 second g = +2 r l = 150 ? v s = 5v v out = 2v p-p 02866-004 third figure 4. ad8007 second and third harmonic distortion vs. frequency
important links for the ad8007_8008 * last content update 08/18/2013 06:08 pm parametric selection tables find similar products by operating parameters high speed amplifiers selection table documentation an-692: universal precision op amp evaluation board an-649: using the analog devices active filter design tool mt-057: high speed current feedback op amps mt-051: current feedback op amp noise considerations mt-034: current feedback (cfb) op amps mt-059: compensating for the effects of input capacitance on vfb and cfb op amps used in current-to-voltage converters a stress-free method for choosing high-speed op amps current feedback amplifiers part 1: ask the applications engineer-22 current feedback amplifiers part 2: ask the applications engineer-23 two-stage current-feedback amplifier for the ad8007 an-358: noise and operational amplifier circuits an-356: user's guide to applying and measuring operational amplifier specifications an-257: careful design tames high speed op amps an-253: find op amp noise with spreadsheet ug-112: universal evaluation board for single, high speed op amps offered in sc-70 packages ug-101: evaluation board user guide for the ad8008 ug-129: evaluation board user guide ug-128: universal evaluation board for dual high speed op amps in soic packages evaluation kits & symbols & footprints view the evaluation boards and kits page for the ad8007 view the evaluation boards and kits page for the ad8008 symbols and footprints for the ad8007 symbols and footprints for the ad8008 design tools, models, drivers & software analog filter wizard 2.0 ad8007/ad8008 spice macro-model design collaboration community collaborate online with the adi support team and other designers about select adi products. follow us on twitter: www.twitter.com/adi_news like us on facebook: www.facebook.com/analogdevicesinc design support submit your support request here: linear and data converters embedded processing and dsp telephone our customer interaction centers toll free: americas: 1-800-262-5643 europe: 00800-266-822-82 china: 4006-100-006 india: 1800-419-0108 russia: 8-800-555-45-90 quality and reliability lead(pb)-free data sample & buy ad8007 ad8008 view price & packaging request evaluation board request samples check inventory & purchase find local distributors * this page was dynamically generated by analog devices, inc. and inserted into this data sheet. note: dynamic changes to the content on this page (labeled 'important links') does not constitute a change to the revision number of the product data sheet. this content may be frequently modified. powered by tcpdf (www.tcpdf.org)
ad8007/ad8008 rev. e | page 2 of 2 0 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? connection diagrams ...................................................................... 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? v s = 5 v ....................................................................................... 3 ? v s = 5 v .......................................................................................... 4 ? absolute maximum ratings ............................................................ 6 ? maximum power dissipation ......................................................... 6 ? output short circuit ........................................................................ 6 ? esd caution .................................................................................. 6 ? typical performance characteristics ..............................................7 ? theory of operation ...................................................................... 15 ? using the ad8007/ad8008 ...................................................... 15 ? layout considerations ............................................................... 16 ? layout and grounding considerations ...................................... 17 ? grounding ................................................................................... 17 ? input capacitance ...................................................................... 17 ? output capacitance ................................................................... 17 ? input-to-output coupling ........................................................ 17 ? external components and stability ......................................... 17 ? outline dimensions ....................................................................... 18 ? ordering guide .......................................................................... 19 ? revision history 11/09rev. d to rev. e change to output capacitance section ....................................... 17 updated outline dimensions ....................................................... 18 changes to ordering guide .......................................................... 19 6/03rev. c to rev. d change to layout considerations section .................................. 15 deleted figure 7 .............................................................................. 16 deleted evaluation board section ................................................ 16 updated outline dimensions ....................................................... 16 10/02rev. b to rev. c connection diagrams captions updated .................................... 1 ordering guide updated ................................................................ 5 figure 5 edited ............................................................................... 14 updated outline dimensions ....................................................... 19 9/02rev. a to rev. b updated outline dimensions ....................................................... 19 8/02rev. 0 to rev. a added ad8008 .................................................................. universal added soic-8 (rn) and msop-8 (rm) ...................................... 1 changes to features .......................................................................... 1 changes to general description .................................................... 1 changes to specifications ................................................................ 2 edits to maximum power dissipation section ............................. 4 new figure 2 ..................................................................................... 4 changes to ordering guide ............................................................ 5 new tpcs 19 to 24 and tpcs 27, 29, 30, and 35 .......................... 9 changes to evaluation board section ......................................... 16 msop-8 (rm) added ................................................................... 19
ad8007/ad8008 rev. e | page 3 of 20 specifications v s = 5 v t a = 25c, r s = 200 , r l = 150 , r f = 499 , gain = +2, unless otherwise noted. table 1. ad8007/ad8008 parameter conditions min typ max unit dynamic performance ?3 db bandwidth g = +1, v o = 0.2 v p-p, r l = 1 k 540 650 mhz g = +1, v o = 0.2 v p-p, r l = 150 250 500 mhz g = +2, v o = 0.2 v p-p, r l = 150 180 230 mhz g = +1, v o = 2 v p-p, r l = 1 k 200 235 mhz bandwidth for 0.1 db flatness v o = 0.2 v p-p, g = +2, r l = 150 50 90 mhz overdrive recovery time 2.5 v input step, g = +2, r l = 1 k 30 ns slew rate g = +1, v o = 2 v step 900 1000 v/s settling time to 0.1% g = +2, v o = 2 v step 18 ns settling time to 0.01% g = +2, v o = 2 v step 35 ns noise/harmonic performance second harmonic f c = 5 mhz, v o = 2 v p-p ?88 dbc f c = 20 mhz, v o = 2 v p-p ?83/?77 dbc third harmonic f c = 5 mhz, v o = 2 v p-p ?101 dbc imd f c = 20 mhz, v o = 2 v p-p ?92/?98 dbc f c = 19.5 mhz to 20.5 mhz, r l = 1 k, v o = 2 v p-p ?77 dbc third-order intercept f c = 5 mhz, r l = 1 k 43.0/42.5 dbm f c = 20 mhz, r l = 1 k 42.5 dbm crosstalk (ad8008) f = 5 mhz, g = +2 ?68 db input voltage noise f = 100 khz 2.7 nv/hz input current noise ?input, f = 100 khz 22.5 pa/hz +input, f = 100 khz 2 pa/hz differential gain error ntsc, g = +2, r l = 150 0.015 % differential phase error ntsc, g = +2, r l = 150 0.010 degree dc performance input offset voltage 0.5 4 mv input offset voltage drift 3 v/c input bias current +input 4 8 a ?input 0.4 6 a input bias current drift +input 16 na/c ?input 9 na/c transimpedance v o = 2.5 v, r l = 1 k 1.0 1.5 m r l = 150 0.4 0.8 m input characteristics input resistance +input 4 m input capacitance +input 1 pf input common-mode voltage range ?3.9 to +3.9 v common-mode rejection ratio v cm = 2.5 v 56 59 db output characteristics output saturation voltage v cc ? v oh , v ol ? v ee , r l = 1 k 1.1 1.2 v short-circuit current, source 130 ma short-circuit current, sink 90 ma capacitive load drive 30% overshoot 8 pf
ad8007/ad8008 rev. e | page 4 of 20 ad8007/ad8008 parameter conditions min typ max unit power supply operating range 5 12 v quiescent current per amplifier 9 10.2 ma power supply rejection ratio +psrr 59 64 db ?psrr 59 65 db v s = 5 v t a = 25c, r s = 200 , r l = 150 , r f = 499 , gain = +2, unless otherwise noted. table 2. ad8007/ad8008 unit parameter conditions min typ max dynamic performance ?3 db bandwidth g = +1, v o = 0.2 v p-p, r l = 1 k 520 580 mhz g = +1, v o = 0.2 v p-p, r l = 150 350 490 mhz g = +2, v o = 0.2 v p-p, r l = 150 190 260 mhz g = +1, v o = 1 v p-p, r l = 1 k 270 320 mhz bandwidth for 0.1 db flatness v o = 0.2 v p-p, g = +2, r l = 150 72 120 mhz overdrive recovery time 2.5 v input step, g = +2, r l = 1 k 30 ns slew rate g = +1, v o = 2 v step 665 740 v/s settling time to 0.1% g = +2, v o = 2 v step 18 ns settling time to 0.01% g = +2, v o = 2 v step 35 ns noise/harmonic performance second harmonic f c = 5 mhz, v o = 1 v p-p ?96/?95 dbc f c = 20 mhz, v o = 1 v p-p ?83/?80 dbc third harmonic f c = 5 mhz, v o = 1 v p-p ?100 dbc f c = 20 mhz, v o = 1 v p-p ?85/?88 dbc imd f c = 19.5 mhz to 20.5 mhz, r l = 1 k, v o = 1 v p-p ?89/?87 dbc third-order intercept f c = 5 mhz, r l = 1 k 43.0 dbm f c = 20 mhz, r l = 1 k 42.5/41.5 dbm crosstalk (ad8008) output-to-output, f = 5 mhz, g = +2 ?68 db input voltage noise f = 100 khz 2.7 nv/hz input current noise ?input, f = 100 khz 22.5 pa/hz +input, f = 100 khz 2 pa/hz dc performance input offset voltage 0.5 4 mv input offset voltage drift 3 v/c input bias current +input 4 8 a ?input 0.7 6 a input bias current drift +input 15 na/c ?input 8 na/c transimpedance v o = 1.5 v to 3.5 v, r l = 1 k 0.5 1.3 m r l = 150 0.4 0.6 m input characteristics input resistance +input 4 m input capacitance +input 1 pf input common-mode voltage range 1.1 to 3.9 v common-mode rejection ratio v cm = 1.75 v to 3.25 v 54 56 db
ad8007/ad8008 rev. e | page 5 of 20 ad8007/ad8008 unit parameter conditions min typ max output characteristics output saturation voltage v cc ? v oh , v ol ? v ee , r l = 1 k 1.05 1.15 v short-circuit current, source 70 ma short-circuit current, sink 50 ma capacitive load drive 30% overshoot 8 pf power supply operating range 5 12 v quiescent current per amplifier 8.1 9 ma power supply rejection ratio +psrr 59 62 db ?psrr 59 63 db
ad8007/ad8008 rev. e | page 6 of 20 absolute maximum ratings table 3. parameter rating supply voltage 12.6 v power dissipation see figure 5 common-mode input voltage v s differential input voltage 1.0 v output short-circuit duration see figure 5 storage temperature range ?65c to +125c operating temperature range ?40c to +85c lead temperature (soldering, 10 sec) 300c rms output voltages should be considered. if r l is referenced to v s , as in single-supply operation, then the total drive power is v s i out . if the rms signal levels are indeterminate, then consider the worst case, when v out = v s /4 for r l to midsupply l s ss d r v ivp 2 4 )( ? ? ? ? ? ? += in single-supply operation, with r l referenced to v s , worst case is v out = v s /2. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. airflow increases heat dissipation, effectively reducing ja . in addition, more metal directly in contact with the package leads from metal traces, through-holes, ground, and power planes reduces the ja . care must be taken to minimize parasitic capacitances at the input leads of high speed op amps, see the layout considerations section. figure 5 shows the maximum safe power dissipation in the package vs. the ambient temperature for the soic-8 (125c/w), msop-8 (150c/w), and sc70-5 (210c/w) packages on a jedec standard 4-layer board. ja values are approximations. maximum power dissipation the maximum safe power dissipation in the ad8007/ad8008 packages is limited by the associated rise in junction temperature (t j ) on the die. the plastic encapsulating the die locally reaches the junction temperature. at approximately 150c, which is the glass transition temperature, the plastic changes its properties. even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ad8007/ad8008. exceeding a junction temperature of 175c for an extended time can result in changes in the silicon devices, potentially causing failure. ambient temperature (c) 2.0 1.5 0 001 06 ? ?40 maximum power dissip a tion (w) ?20 0 20 40 60 80 1.0 0.5 soic-8 sc70-5 msop-8 0 2866-005 the still-air thermal properties of the package and pcb ( ja ), ambient temperature (t a ), and the total power dissipated in the package (p d ) determine the junction temperature of the die. the junction temperature can be calculated as t j = t a + (p d ja ) iure aiu power dissiation vs teerature or a laer oard the power dissipated in the package (p d ) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. the quiescent power is the voltage between the supply pins (v s ) times the quiescent current (i s ). assuming the load (r l ) is referenced to midsupply, the total drive power is v s /2 i out , some of which is dissipated in the package and some in the load (v out i out ). the difference between the total drive power and the load power is the drive power dissipated in the package. output short circuit shorting the output to ground or drawing excessive current for the ad8007/ad8008 will likely cause catastrophic failure. esd caution p d = quiescent power + ( total drive power ? load power ) l out l out s ss d r v r v v ivp 2 2 )( ? ? ? ? ? ? ? ? ? +=
ad8007/ad8008 rev. e | page 7 of 20 typical performance characteristics v s = 5 v, r l = 150 , r s = 200 , r f = 499 , unless otherwise noted. frequency (mhz) 3 2 ?5 1 100 10 normalized gain (db) ?1 ?2 ?3 ?4 1 0 ?6 ?7 1000 g = +1 g = +2 g = +10 g = ?1 02866-006 figure 6. small signal frequency response for various gains frequency (mhz) 3 2 ?5 100 10 gain (db) ?1 ?2 ?3 ?4 1 0 ?6 ?7 1000 g = +1 r l = 1k ? , v s = 5v r l = 150k ? , v s = 5v r l = 150k ? , v s = 5v 02866-007 figure 7. small signal frequency response for v s and r l frequency (mhz) 3 2 ?5 100 10 gain (db) ?1 ?2 ?3 ?4 1 0 ?6 ?7 1000 g = +1 r l = 1k ? r s = 200 ? r s = 301 ? r s = 249 ? 02866-008 figure 8. small signal frequency response for various r s values frequency (mhz) 6.4 6.3 5.6 100 10 gain (db) 6.0 5.9 5.8 5.7 6.2 6.1 5.5 5.4 1000 g = +2 v s = +5v v s = 5v 02866-009 figure 9. 0.1 db gain flatness; v s = +5, v s = 5 v frequency (mhz) 9 8 1 100 10 gain (db) 5 4 3 2 7 6 0 ?1 1000 g = +2 r l = 1k ? , v s = +5v r l = 150k ? , v s = +5v r l = 1k ? , v s = 5v r l = 150k ? , v s = 5v 02866-010 figure 10. small signal frequency response for v s and r l frequency (mhz) 9 8 1 100 10 gain (db) 5 4 3 2 7 6 0 ?1 1000 g = +2 r f = r g = 324 ? r f = r g = 249 ? r f = r g = 499 ? r f = r g = 649 ? 02866-011 figure 11. small signal frequency resp onse for various feedback resistors, r f = r g
ad8007/ad8008 rev. e | page 8 of 20 frequency (mhz) 10 9 2 1 100 10 gain (db) 6 5 4 3 8 7 1 0 1000 g = +2 20pf 0pf 499? 499 ? 200? 49.9 ? r snub c load 20pf and 20? snub 20pf and 10? snub 02866-012 figure 12. small signal frequency response for capacitive load and snub resistor frequency (mhz) 3 2 ?5 100 10 gain (db) ?1 ?2 ?3 ?4 1 0 ?6 ?7 1000 g = +1 v s = +5v, +85c v s = 5v, +85c v s = +5v, ?40c v s = 5v, ?40c 02866-013 figure 13. small signal frequency response over temperature, v s = +5 v, v s = 5 v frequency (mhz) 3 2 ?5 1 100 10 normalized gain (db) ?1 ?2 ?3 ?4 1 0 ?6 ?7 1000 v out = 2v p-p g = +1 g = +2 g = +10 g = ?1 02866-014 figure 14. large signal frequency response for various gains frequency (hz) 10m 1m 100k 10k transimpedance ( ? ) 1k 100 10 1 100k 10k 10m 100m 1g 0 ?30 ?90 ?150 ?210 ?270 ?330 phase (degrees) 2g transimpedance phase 30 90 ?180 1m 02866-015 figure 15. transimpedance and phase vs. frequency frequency (mhz) 9 8 1 100 10 gain (db) 5 4 3 2 7 6 0 ?1 1000 g = +2 v s = +5v, +85c v s = 5v, +85c v s = +5v, ?40c v s = 5v, ?40c 02866-016 figure 16. small signal frequency response over temperature, v s = +5 v, v s = 5 v frequency (mhz) 9 8 1 100 10 gain (db) 5 4 3 2 7 6 0 ?1 1000 g = +2 r l = 150 ? ,v s = 5v, v o = 2v p-p r l = 150 ? ,v s = +5v, v o = 1v p-p r l = 1k ? ,v s = +5v, v o = 1v p-p r l = 1k ? ,v s = 5v, v o = 2v p-p 02866-017 figure 17. large signal frequency response for v s and r l
ad8007/ad8008 rev. e | page 9 of 20 frequency (mhz) ?90 10 1 disto r tion (dbc) ?50 ?60 ?70 ?80 ? 40 ?100 ?110 100 g = +1 v s = 5v v o = 1v p-p hd2, r l = 150 ? hd3, r l = 150 ? hd2, r l = 1k ? hd3, r l = 1k ? 02866-018 figure 18. ad8007 second and third harmonic distortion vs. frequency and r l frequency (mhz) ?90 10 1 disto r tion (dbc) ?50 ?60 ?70 ?80 ? 40 ?10 0 ?11 0 100 g = +1 v s = 5v v o = 2v p-p hd2, r l = 150 ? hd2, r l = 1k ? hd3, r l = 1k ? hd3, r l = 150 ? 0 2866-019 figure 19. ad8007 second and third harmonic distortion vs. frequency and r l frequency (mhz) ?90 10 1 disto r tion (dbc) ?50 ?60 ?70 ?80 ?40 ?100 ?110 100 ? 30 v s = 5v v o = 2v p-p r l = 150 ? hd2, g = +10 hd3, g = +10 hd3, g = +1 hd2, g = +1 0 2866-020 figure 20. ad8007 second and third harmon ic distortion vs. frequency and gain frequency (mhz) ?90 10 1 disto r tion (dbc) ?50 ?60 ?70 ?80 ? 40 ?10 0 ?11 0 100 g = +2 v s = 5v v o = 1v p-p hd2, r l = 1k ? hd2, r l = 150 ? hd3, r l = 150 ? hd3, r l = 1k ? 02866-021 figure 21. ad8007 second and third harmonic distortion vs. frequency and r l frequency (mhz) ?90 10 1 disto r tion (dbc) ?50 ?60 ?70 ?80 ? 40 ?100 ? 110 100 g = +2 v s = 5v v o = 2v p-p hd2, r l = 1k ? hd2, r l = 150 ? hd3, r l = 150 ? hd3, r l = 1k ? 02866-022 figure 22. ad8007 second and third harmonic distortion vs. frequency and r l frequency (mhz) ?90 10 1 disto r tion (dbc) ?50 ?60 ?70 ?80 ?40 ?100 ?110 100 ? 30 g = +2 v s = 5v r l = 150 ? hd3, v o = 4v p-p hd2, v o = 4v p-p hd2, v o = 2v p-p hd3, v o = 2v p-p 0 2866-023 figure 23. ad8007 second and third harmonic distortion vs. frequency and v o
ad8007/ad8008 rev. e | page 10 of 20 v s = 5 v, r s = 200 , r f = 499 , r l = 150 , @ 25c, unless otherwise noted. frequency (mhz) 100 10 ? 40 1 disto r tion (dbc) ?110 ?100 ?90 ?80 ?70 ?60 ?50 g = 1 v s = 5v v o = 1v p-p hd2, r l = 150 ? hd2, r l = 1k ? hd3, r l = 150 ? hd3, r l = 1k ? 02866-024 figure 24. ad8008 second and third harmonic distortion vs. frequency and r l frequency (mhz) ? 40 1 100 10 disto r tion (dbc) ?110 ?100 ?90 ?80 ?70 ?60 ?50 g = 1 v s = 5v v o = 1v p-p hd2, r l = 150 ? hd2, r l = 1k ? hd3, r l = 1k ? hd3, r l = 150 ? 02866-025 figure 25. ad8008 second and third harmonic distortion vs. frequency and r l frequency (mhz) 100 10 hd2, g = 10 hd2, g = 1 hd3, g = 1 hd3, g = 10 ?40 1 disto r tion (dbc) ?110 ?100 ?90 ?80 ?70 ?60 ?50 ? 30 v s = 5v v o = 2v p-p r l = 150 ? 02866-026 figure 26. ad8008 second and third harmon ic distortion vs. frequency and gain frequency (mhz) 100 10 ? 40 1 disto r tion (dbc) ?110 ?100 ?90 ?80 ?70 ?60 ?50 g = 2 v s = 5v v o = 1v p-p hd2, r l = 150 ? hd2, r l = 1k ? hd3, r l = 150 ? hd3, r l = 1k ? 02866-027 figure 27. ad8008 second and third harmonic distortion vs. frequency and r l frequency (mhz) 100 10 ? 40 1 disto r tion (dbc) ?110 ?100 ?90 ?80 ?70 ?60 ?50 g = 2 v s = 5v v o = 2v p-p hd2, r l = 1k ? hd2, r l = 150 ? hd3, r l = 1k ? hd3, r l = 150 ? 02866-028 figure 28. ad8008 second and third harmonic distortion vs. frequency and r l frequency (mhz) 100 10 ?40 ?110 ?100 ?90 ?80 ?70 ?60 ?50 ? 30 1 disto r tion (dbc) g = 2 r l = 150 ? v s = 5v hd2, v o = 4v p-p hd2, v o = 2v p-p hd3, v o = 4v p-p hd3, v o = 2v p-p 02866-029 figure 29. ad8008 second and third harmonic distortion vs. frequency and v o
ad8007/ad8008 rev. e | page 11 of 20 ?90 1.5 1.0 disto r tion (dbc) ?70 ?75 ?80 ?85 ?65 2.0 2.5 ? 60 v out (v p-p) g = +2 v s = 5v f o = 20mhz hd3, r l = 1k ? hd2, r l = 1k ? hd3, r l = 150 ? hd2, r l = 150 ? 02866-030 figure 30. ad8007 second and third harmonic distortion vs. v out and r l frequency (mhz) 38 5 third order intercept (dbm) 42 41 40 39 43 37 36 35 10 15 20 25 30 35 40 45 50 55 60 65 70 44 g = +2 v s = 5v v o = 2v p-p r l = 1k ? 02866-031 figure 31. ad8007 third-order intercept vs. frequency ?90 1.5 1.0 ?70 ?75 ?80 ?85 ? 65 2.0 2 .5 disto r tion (dbc) g = +2 v s = 5v f o = 20mhz hd2, r l = 150 ? hd2, r l = 1k ? v out (v p-p) hd3, r l = 150 ? hd3, r l = 1k ? 0 2866-032 figure 32. ad8008 second and third harmonic distortion vs. v out and r l ?90 2 1 disto r tion (dbc) ?70 ?75 ?80 ?85 ? 65 34 ?95 ?100 ?105 ?110 56 g = +2 v s = 5v f o = 20mhz hd2, r l = 150 ? hd3, r l = 1k ? hd2, r l = 1k ? hd3, r l = 150 ? v out (v p-p) 02866-033 figure 33. ad8007 second and third harmonic distortion vs. v out and r l frequency (mhz) 38 42 41 40 39 43 70 44 37 36 35 65 60 555045403530 25 20 15 10 5 third-order intercept (dbm) g = +2 v s = 5v v o = 2v p-p r l = 1k ? 02866-034 figure 34. ad8008 third-order intercept vs. frequency ?90 1 ?70 ?75 ?80 ?85 ? 65 6 2 ?95 ?100 ?105 ?110 345 hd2, r l = 1k ? hd2, r l = 150 ? hd3, r l = 150 ? hd3, r l = 1k ? g = +2 v s = 5v f o = 20mhz v out (v p-p) disto r tion (dbc) 02866-035 figure 35. ad8008 second and third harmonic distortion vs. v out and r l
ad8007/ad8008 rev. e | page 12 of 20 v s = 5 v, r l = 150 , r s = 200 , r f = 499 , unless otherwise noted. frequency (hz) k1 0 1 100 voltage noise (nv/ hz) 100 10 1 10k 100k 1m 2.7nv/ hz 02866-036 figure 36. input voltage noise vs. frequency frequency (hz) m01 k00 11 m output impedance ( ? ) 100 10 1 100m 1g 1k 0.1 0.01 g = +2 02866-037 figure 37. output im pedance vs. frequency frequency (hz) 100m 1g cmrr (db) ?10 ?20 ?30 100k 1m 0 10m ?40 ?50 ?60 ?70 v s = 5v, +5v 02866-038 figure 38. cmrr vs. frequency frequency (hz) k01 0 1 100 current noise (pa/ hz) 100 10 1 100k 1m 1000 10m 1k noninverting current noise 2.0pa/ hz inverting current noise 22.5pa / hz 02866-039 figure 39. input current noise vs. frequency frequency (hz) 1g 100k c r osstalk (db) ?100 1m 10m 100m ?90 ?80 ?70 ?60 ?50 ?40 ? 20 ?3 0 side b driven side a driven g = +2 r = 150 ? v s = 5v v m = 1v p-p 02866-040 figure 40. ad8008 crosstalk vs . frequency (output to output) frequency (hz) 20 10 m1 k0 1 100k psrr (db) ?20 ?30 ?40 ?50 0 ?10 10m 100m 1g ?60 ?70 ?80 +psrr ?psrr 02866-041 figure 41. psrr vs. frequency
ad8007/ad8008 rev. e | page 13 of 20 50mv/div 010 20 30 40 50 time (ns) g = +1 r l = 150 ? ,v s = +5v and 5v r l = 150 ? ,v s = +5v and 5v 02866-042 figure 42. small signal transient response for r l = 150 , r l = 1 k and v s = +5 v, v s = 5 v 1v/div g = +1 0 102030405 time (ns) r l = 150 ? r l = 1k ? 02866-043 0 figure 43. large signal transient response for r l = 150 , r l = 1 k g = +2 1v/div 0 50 40 30 20 10 ti m e (ns) c load = 0pf c load = 10pf c load = 20pf 02866-044 figure 44. large signal transient response for c load = 0 pf, c load = 10 pf, and c load = 20 pf g = +2 50mv/div 0102030405 time (ns) 0 r l = 150 ? ,v s = +5v and 5v r l = 1k ? ,v s = +5v and 5v 02866-045 figure 45. small signal transient response for r l = 150 , r l = 1 k and v s = +5 v, v s = 5 v g = ?1 1v/div 0102030405 time (ns) 0 input output 02866-046 figure 46. large signal transient response, g = ?1, r l = 150 50mv/div 499 ? 499 ? 200? 49.9 ? r snub c load + ? g = +2 010 2030405 time (ns) c l = 0pf c l = 20pf c l = 20pf r snub = 10 ? 02866-047 0 figure 47. small signal transient response, effect of series snub resistor when driving capacitive load
ad8007/ad8008 rev. e | page 14 of 20 0 100 200 time (ns) input (1v/div) output (2v/div) 300 400 500 g = +2 +v s ?v s r l = 150 ? r l = 1k ? 02866-048 figure 48. output ov erdrive recovery, r l = 1 k, 150 , v in = 2.5 v 0 time (ns) 5 1015 202530 354045 g = +2 0.1 0 settlin g time (%) 0.2 0.3 0.4 0.5 ?0.1 ?0.2 ?0.3 ?0.4 ?0.5 18ns 0 2866-049 figure 49. 0.1% settling time, 2 v step r l ( ? ) ?1 200 0 3 2 1 0 4 400 600 ?2 ?3 ?4 800 1000 v out ( v) g = +10 v s = 5v v in = 0.75v 02866-050 figure 50. v out swing vs. r l , v s = 5 v, g = +10, v in = 0.75 v
ad8007/ad8008 rev. e | page 15 of 20 theory of operation the ad8007 (single) and ad8008 (dual) are current feedback amplifiers optimized for low distortion performance. a simplified conceptual diagram of the ad8007 is shown in figure 51 . it closely resembles a classic current feedback amplifier comprised of a complementary emitter-follower input stage, a pair of signal mirrors, and a diamond output stage. however, in the case of the ad8007/ad8008, several modifications were made to improve the distortion performance over that of a classic current feedback topology. i di ? +v s ?v s c j 1 c j 2 q1 q2 in? ? ? ? d1 d2 i 1 i 2 in + i 3 i 4 i do q3 q4 q5 q6 +v s ?v s r f out r g m2 m1 high-z 02866-051 figure 51. simplified schematic of ad8007 the signal mirrors were replaced with low distortion, high precision mirrors. in figure 51 , they are shown as m1 and m2. their primary function from a distortion standpoint is to reduce the effect of highly nonlinear distortion caused by capacitances, cj1 and cj2. these capacitors represent the collector-to-base capacitances of the output devices of the mirrors. a voltage imbalance arises across the output stage, as measured from the high impedance node, high-z, to the output node, out. this imbalance is a result of delivering high output currents and is the primary cause of output distortion. circuitry is included to sense this output voltage imbalance and generate a compensating current, i do . when injected into the circuit, i do reduces the distortion that could be generated at the output stage. similarly, the nonlinear voltage imbalance across the input stage (measured from the noninverting to the inverting input) is sensed, and a current, i di , is injected to compensate for input-generated distortion. the design and layout are strictly top-to-bottom symmetric to minimize the presence of even-order harmonics. using the ad8007/ad8008 supply decoupling for low distortion decoupling for low distortion performance requires careful consideration. the commonly adopted practice of returning the high frequency supply decoupling capacitors to physically separate (and possibly distant) grounds can lead to degraded even-order harmonic performance. this situation is shown in figure 52 using the ad8007 as an example; however, it is not recommended. for a sinusoidal input, each decoupling capacitor returns to its ground a quasi-rectified current carrying high even-order harmonics. +v s ?v s r g 499? r s 200? in r f 499? gnd 1 gnd 2 out ad8007 + + 10f 10f 0.1f 0.1f 02866-052 figure 52. high frequency capacitors returned to physically separate grounds (not recommended) the decoupling scheme shown in figure 53 is recommended. in figure 53 , the two high frequency decoupling capacitors are first tied together at a common node and are then returned to the ground plane through a single connection. by first adding the two currents flowing through each high frequency decoupling capacitor, this ensures that the current returned into the ground plane is only at the fundamental frequency. +v s ?v s r g 499? r s 200? in r f 499 ? out ad8007 + + 10f 0.1f 10f 0.1f 02866-053 figure 53. high frequency capacitors returned to ground at a single point (recommended)
ad8007/ad8008 rev. e | page 16 of 20 whenever physical layout considerations prevent the decoupling scheme shown in figure 53 , the user can connect one of the high frequency decoupling capacitors directly across the supplies and connect the other high frequency decoupling capacitor to ground (see figure 54 ). +v s ?v s r g 499 ? r s 200 ? in r f 499 ? out ad8007 + + 10f 10f c1 0.1f c2 0.1f 02866-054 figure 54. high frequency capacito rs connected across the supplies (recommended) layout considerations the standard noninverting configuration with recommended power supply bypassing is shown in figure 54 . the 0.1 f high frequency decoupling capacitors should be x7r or npo chip components. connect c2 from the +v s pin to the ?v s pin. connect c1 from the +v s pin to signal ground. the length of the high frequency bypass capacitor leads is critical. parasitic inductance due to long leads works against the low impedance created by the bypass capacitor. the ground for the load impedance should be at the same physical location as the bypass capacitor grounds. for larger value capacitors, which are intended to be effective at lower frequencies, the current return path distance is less critical.
ad8007/ad8008 rev. e | page 17 of 20 layout and grounding considerations grounding a ground plane layer is important in densely packed printed circuit boards (pcb) to minimize parasitic inductances. however, an understanding of where the current flows in a circuit is critical to implementing effective high speed circuit design. the length of the current path is directly proportional to the magnitude of parasitic inductances and thus the high frequency impedance of the path. high speed currents in an inductive ground return create unwanted voltage noise. broad ground plane areas reduce parasitic inductance. input capacitance along with bypassing and ground, high speed amplifiers can be sensitive to parasitic capacitance between the inputs and ground. even 1 pf or 2 pf of capacitance reduces the input impedance at high frequencies, in turn increasing the gain of the amplifier, which causes peaking of the frequency response or even oscillations if severe enough. place the external passive components that are connected to the input pins as close as possible to the inputs to avoid parasitic capacitance. the ground and power planes must be kept at a distance of at least 0.05 mm from the input pins on all layers of the board. output capacitance to a lesser extent, parasitic capacitances on the output can cause peaking of the frequency response. the following two methods minimize its effect: ? put a small value resistor in series with the output to isolate the load capacitance from the output stage of the amplifier (see figure 12 ). ? increase the phase margin by increasing the gain of the amplifier or by increasing the value of the feedback resistor. input-to-output coupling to minimize capacitive coupling, the input and output signal traces should not be parallel. when they are not parallel, they help reduce unwanted positive feedback. external components and stability the ad8007/ad8008 are current feedback amplifiers and, to a first order, the feedback resistor determines the bandwidth and stability. the gain, load impedance, supply voltage, and input impedances also have an effect. figure 11 shows the effect of changing r f on the bandwidth and peaking for a gain of 2. increasing r f reduces peaking but also reduces bandwidth. figure 6 shows that for a given r f increasing the gain also reduces peaking and bandwidth. table 4 shows the recommended r f and r g values that optimize bandwidth with minimal peaking. table 4. recommended component values gain r f () r g () r s () ?1 499 499 200 +1 499 not applicable 200 +2 499 499 200 +5 499 124 200 +10 499 54.9 200 the load resistor also affects bandwidth, as shown in figure 7 and figure 10 . a comparison between figure 7 and figure 10 also demonstrates the effect of gain and supply voltage. when driving loads with a capacitive component, stability improves by using a series snub resistor, r snub , at the output. the frequency and pulse responses for various capacitive loads are illustrated in figure 12 and figure 47 , respectively. for noninverting configurations, a resistor in series with the input, r s , is needed to optimize stability for a gain of 1, as illustrated in figure 8 . for larger noninverting gains, the effect of a series resistor is reduced.
ad8007/ad8008 rev. e | page 18 of 20 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-a a 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 55. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) compliant to jedec standards mo-187-aa 091709-a 6 0 0.70 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.13 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 figure 56. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters
ad8007/ad8008 rev. e | page 19 of 20 compliant to jedec standards mo-203-aa 1.00 0.90 0.70 0.46 0.36 0.26 2.20 2.00 1.80 2.40 2.10 1.80 1.35 1.25 1.15 072809-a 0.10 max 1.10 0.80 0.40 0.10 0.22 0.08 3 12 4 5 0.65 bsc coplanarity 0.10 seating plane 0.30 0.15 figure 57. 5-lead thin shrink small outline transistor package [sc70] (ks-5) dimensions shown in millimeters ordering guide model temperature range package description package outline branding ad8007aks-r2 ?40c to +85c 5-lead sc70 ks-5 hta ad8007aksz-r2 1 ?40c to +85c 5-lead sc70 ks-5 htc ad8007aksz-reel 1 ?40c to +85c 5-lead sc70 ks-5 htc ad8007aksz-reel7 1 ?40c to +85c 5-lead sc70 ks-5 htc ad8007ar ?40c to +85c 8-lead soic r-8 ad8007ar-reel ?40c to +85c 8-lead soic r-8 ad8007ar-reel7 ?40c to +85c 8-lead soic r-8 ad8007arz 1 ?40c to +85c 8-lead soic r-8 ad8007arz-reel 1 ?40c to +85c 8-lead soic r-8 ad8007arz-reel7 1 ?40c to +85c 8-lead soic r-8 ad8008ar ?40c to +85c 8-lead soic r-8 AD8008AR-REEL7 ?40c to +85c 8-lead soic r-8 AD8008AR-REEL ?40c to +85c 8-lead soic r-8 ad8008arz 1 ?40c to +85c 8-lead soic r-8 ad8008arz-reel7 1 ?40c to +85c 8-lead soic r-8 ad8008arz-reel 1 ?40c to +85c 8-lead soic r-8 ad8008arm ?40c to +85c 8-lead msop rm-8 h2b ad8008arm-reel ?40c to +85c 8-lead msop rm-8 h2b ad8008arm-reel7 ?40c to +85c 8-lead msop rm-8 h2b ad8008armz 1 ?40c to +85c 8-lead msop rm-8 h2b# ad8008armz-reel 1 ?40c to +85c 8-lead msop rm-8 h2b# ad8008armz-reel7 1 ?40c to +85c 8-lead msop rm-8 h2b# 1 z = rohs compliant part, # denotes rohs compliant part may be top or bottom marked.
ad8007/ad8008 rev. e | page 20 of 20 notes ?2002C2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d02866-0-11/09(e)

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